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[Communication伪随机序列

Description: 线形反馈移位寄存器(LFSR)是数字系统中一个重要的结构,本程序可以自动产生AHDL,VHDL,Verilog的源代码及电路原理图。程序可以运行在win98/2000/NT平台-linear feedback shift register (LFSR) digital system is an important structure, the process can be automatically generated AHDL, VHDL, Verilog source code and circuit schematics. Procedures can run on platforms win98/2000/NT
Platform: | Size: 162816 | Author: 夏沫 | Hits:

[Windows Develop移位寄存器

Description: 移位寄存器,VHDL编写,具有很高的参考价值~-a shift register written in VHDL, which has very high reference value.
Platform: | Size: 1024 | Author: | Hits:

[Other时序逻辑:VHDL实例---移位寄存器

Description: 时序逻辑种类:VHDL实例---移位寄存器-sequential logic types : VHDL examples--- Shift Register
Platform: | Size: 2048 | Author: 张洪 | Hits:

[source in ebookC_9

Description: 100个经典vhdl编程实例, 第1例 带控制端口的加法器 第2例 无控制端口的加法器 第3例 乘法器 第4例 比较器 第5例 二路选择器 第6例 寄存器 第7例 移位寄存器 第8例 综合单元库 第9例 七值逻辑与基本数据类型 第10例 函数 第11例 七值逻辑线或分辨函数 第12例 转换函数 第13例 左移函数 第14例 七值逻辑程序包 第15例 四输入多路器...... -100 vhdl classical programming examples, No. 1 is the control port Adder first two cases of uncontrolled port Adder No. 3 Multiplier first four cases compared with the first five cases 2 Lu choice for the first six cases Register No. 7 cases shift register first eight cases consolidated for the first module nine cases seven-valued logic and basic data types No. 10 No. 11 cases function seven-valued logic function or defective Line No. 12 conversion functions No. 13 bits function section 14 cases 7 logic package No. 15 cases four multi-input devices ......
Platform: | Size: 336896 | Author: | Hits:

[Othershift8

Description: 8 位移位寄存器 VHDL程序 VHDL程序 VHDL程序-8-bit shift register VHDL procedures VHDL procedures VHDL procedures
Platform: | Size: 197632 | Author: 周辉 | Hits:

[VHDL-FPGA-Verilogshift

Description: 移位寄存器,异步清零,异步置数,左移右移可控,具有循环移位功能-Shift Register, Asynchronous Clear, asynchronous purchase the number of controllable left shifted to right with a cyclic shift function
Platform: | Size: 197632 | Author: 郭明 | Hits:

[VHDL-FPGA-Verilogshift_register

Description: -- DESCRIPTION : Shift register -- Type : univ -- Width : 4 -- Shift direction: right/left (right active high) -- -- CLK active : high -- CLR active : high -- CLR type : synchronous -- SET active : high -- SET type : synchronous -- LOAD active : high -- CE active : high -- SERIAL input : SI-- DESCRIPTION: Shift register- Type: univ- Width: 4- Shift direction: right/left (right active high )---- CLK active: high- CLR active: high- CLR type: synchronous-- SET active: high- SET type: synchronous- LOAD active: high- CE active: high- SERIAL input: SI
Platform: | Size: 1024 | Author: sanshanchuns | Hits:

[VHDL-FPGA-VerilogLFSR

Description: 自动生成线形反馈移位寄存器的各种HDL源代码和原理图的工具-Automatic generation of linear feedback shift register of a variety of HDL source code and schematic tools
Platform: | Size: 162816 | Author: zx | Hits:

[VHDL-FPGA-Verilogshifter

Description: 8位双向移位寄存器: 实现串行数据与并行数据的转换,移位寄存数据功能的-8-bit bi-directional shift register: the realization of serial data and parallel data conversion, data storage function of displacement
Platform: | Size: 45056 | Author: 罗子 | Hits:

[VHDL-FPGA-VerilogR

Description: 双向移位寄存器的原理设计程序,对于初学者将会有很大帮助,尤其在设计功能比较复杂的FPGA时,有些问题其实用这个就很简单-The principle of bi-directional shift register the design process, for beginners there will be a great help, especially in the design features of the FPGA more complex, there are some problems with this very simple
Platform: | Size: 2048 | Author: lijq | Hits:

[Other Embeded programShiftRegister

Description: Shift register verilog code
Platform: | Size: 1024 | Author: selcuk | Hits:

[VHDL-FPGA-Verilogshift_register

Description: 用Verilog实现的移位寄存器,可以实现左移、右移等功能-Using Verilog implementation of the shift register, you can achieve the left, shifted to right and other functions
Platform: | Size: 3072 | Author: huhahuha | Hits:

[Documentsproject

Description: synthesizable code for shift register of user defined size
Platform: | Size: 3072 | Author: krupal | Hits:

[VHDL-FPGA-Verilogpar_serial-and-serial_par-VHDL

Description: 并入串出移位寄存器和8路并行输出串行移位寄存器的VHDL代码,经Quartus II 5.1验证可用-String into a shift register and 8-way parallel output serial shift register of the VHDL code, the Quartus II 5.1 can be used to verify
Platform: | Size: 1024 | Author: 随风 | Hits:

[VHDL-FPGA-Verilogshiftregister

Description: Shift Register. VHDL code and its testbench.
Platform: | Size: 1024 | Author: mehmet | Hits:

[VHDL-FPGA-VerilogUniversalRegister

Description: 普通的缓冲器 这种设计是一个普通的缓冲器,可以做一个直接的缓冲器,也可以做一个双向的转移缓冲器,还可以做一个递增的计数器和递减计数器-Universal Register This design is a universal register which can be used as a straightforward storage register, a bi-directional shift register, an up counter and a down counter.
Platform: | Size: 1024 | Author: 杜翔 | Hits:

[VHDL-FPGA-Verilogmux_reg

Description: VHDL code for a multiplexer and a parallel/serial in parallel/serial out shift register
Platform: | Size: 1024 | Author: Davood | Hits:

[VHDL-FPGA-Verilogshift_register

Description: shift register it is shifte register for vhdl coding
Platform: | Size: 201728 | Author: han | Hits:

[VHDL-FPGA-Verilogsr12univ_a

Description: universal shift register vhdl
Platform: | Size: 1024 | Author: ayhan | Hits:

[VHDL-FPGA-Verilogshift-register-VHDL

Description: 移位寄存器的VHDL实现,可以用quaturs实现。-shift register based on VHDL
Platform: | Size: 3072 | Author: 刘睿 | Hits:
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